Varactors (variable reactors) are frequently employed in integrated circuits (ICs) to provide a degree of frequency tunability for circuits incorporated within the ICs, whereby a voltage is applied across the terminals of a varactor to control a depletion region width, and consequently vary the capacitance of the varactor.
A key feature of a varactor is the ratio of maximum to minimum capacitance variation achievable (Cmax/Cmin). A large Cmax/Cmin ratio is advantageous for providing a greater tuning range (for example, in voltage controlled oscillator (VCO) circuits) and for providing a greater difference between the on and off impedances when a varactor is used in RF switching applications.
One type of varactor that has been used in integrated circuits is the P-N junction diode, which comprises a p-type semiconductor layer abutting an n-type semiconductor layer. When a negative bias voltage (Vbias) is applied across the terminals of a P-N junction diode a depletion region that is formed at the interface between the p-type semiconductor layer and the n-type semiconductor layer widens causing the capacitance of the varactor to decrease.
Accordingly, the minimum capacitance value for a P-N varactor can be considered to be the series combination of the two depletion capacitances of the p-type and n-type layers. As such the minimum capacitance value will be less than the constituent depletion capacitances.
If, however, Vbias is made positive the varactor capacitance will begin to be dominated by charge storage effects, and will be proportional to the carrier recombination lifetime.
Under these operating conditions Vbias must be carefully controlled to avoid forward biasing, which can occur when a large AC signal is superimposed upon Vbias. Forward biasing leads to the formation of a low resistance DC path through the diode, which can seriously degrade the operation of circuits such as VCO's.
Another increasingly commonly used integrated varactor is a MOS-C varactor, which comprises a metal or polysilicon gate separated from a doped bulk semiconductor region by a thin insulating layer, for example silicon dioxide.
The minimum capacitance value for a MOS-C varactor can be considered to be the series combination of a capacitance associated with the insulation layer and a depletion capacitance associated with the doped bulk semiconductor region. As such the minimum capacitance value will be less than the constituent capacitances. The maximum capacitance value for a MOS-C varactor is limited to the capacitance associated with the insulation layer
However, it is desirable to have an integrated varactor that has an improved Cmax/Cmin ratio.